1. FIELD OF THE INVENTION
The present invention relates to the field of semiconductor fabrication and more specifically to a planar antifuse and its method of fabrication in a semiconductor integrated circuit.
2. Discussion of Related Art
Integrated circuits are made up of literally millions of discrete devices such as transistors, capacitors and resistors which are interconnected together to form functional integrated circuits. In many cases, it is desirable to have an option after the fabrication of integrated circuits as to whether or not certain devices or components are to be electrically coupled together. For example, after the completion of a memory product, rows of memory cells are checked to determine which rows contain defective cells. The addresses of defective rows are then coupled to redundant rows provided in the memory circuit. In order to couple the address of defective rows to redundant rows, antifuses are provided. Antifuses are devices which can be irreversibly altered from an initial non-conductive to a conductive state by applying a voltage across it. In this way, addresses of defective rows can be coupled to redunda necessary. Antifuses are also used in logic devices such as programmable application specific integrated circuits (ASICs). Antifuses allow substantially completed integrated circuits to be programmed to a desired functionality.
A problem with present antifuse devices is that they are generally formed between nonplanar interfaces. This results in geometry and topography induced high electric fields which detrimentally affect the performance of the antifuse device. Additionally, the nonplanar of structures typically result in the formation of "stringers" which can cause short circuits and device failures. Additionally, present methods of fabricating antifuses typically utilize complex processes which require many steps such as planarizations and cleaning which increase the cost of the fabricated transistor and which decrease the reliability and manufacturability of the process. Such complex and dirty processes affect the surface properties of the fusing structure which can detrimentally affect the quality and performance of the fabricated antifuse.
Thus, what is necessary is a simple method of fabricating a planar antifuse.